SuperFlash® is SST’s patented and proprietary NOR flash technology. With 80B+ devices shipped, SuperFlash is the non-volatile memory of choice for embedded applications. In high-volume production ...

CMOS is, and will continue to be, the work-horse process technology of the semi-conductor industry. But designers of large devices, of complex SoCs and of devices using multiple IP elements are ...

SMIC has had trouble with yields and output which will reduce this quarter's revenues by 6%, reports DigiTimes. The problems ...

Expands memory chipset offering to cover all JEDEC defined memory modules for servers and PCs ...

Europe is an interesting place to observe complex systems’ development activity. It may not have hyperscalers or smartphone leaders, but on the world stage, it has one of the two dominant commercial ...

The AlphaCORE Long-Reach (LR) Multi-Standard-Serdes (MSS) IP is a high-performance, low-power, DSP-based PHY. It is a highly configurable IP that supports all leading edge NRZ and PAM data center ...

The paper describes the design-for-test (DFT) features of a 10.3125Gb/s Serdes and other such high datarate IP as XAUI, PCIe, and others. It is shown that extensive testability can be implemented in a ...

As silicon manufacturing process nodes keep shrinking and transistors get smaller, System-on-Chip (SoC) are increasingly subject to failures due to changing external conditions such as temperature, ...

Plano, Texas, USA – May 13 2025 – Siemens Digital Industries Software today announced the Questa™ One smart verification software portfolio, combining connectivity, a data driven approach and ...

Our logiRECORDER Director, Jura Ivanovic presents our high bandwidth data logging demo, showing you how the XYLON QUATTRO solves the most advanced requirements of today’s automotive industry.

CELUS, the developer of an AI-assisted electronics design platform, has announced the integration of its CELUS Design Platform with the Cadence OrCAD X Platform, a comprehensive PCB design software ...

TSMC's new A14 process is already backed by certified EDA tools from Cadence, Synopsys, and Siemens to accelerate next-gen AI and chiplet-based designs.